1. Field of the Invention
The present invention relates to a digital-to-analog converter (DAC) configuration, and more particularly, to a DAC that uses fewer switches and has a more efficient circuit configuration.
2. Description of the Prior Art
As shown in FIG. 1, a conventional DAC 100 is formed by a resistor string 110 and a plurality of binary selectors 120. The resistor string 110 is electrically connected between a first voltage level V1 and a second voltage level V2 so that each terminal of the resistors in the string 110 has a specific and different voltage level. Each binary selector 120 includes two switches 122 and 124 respectively controlled by a binary bit and its inverse. The switch that corresponds to the bit having a value equal to ‘1 ’ will be switched on, while another switch that corresponds to the bit having a value equal to ‘0 ’ will be switched off. Please refer to FIG. 2, which shows an example illustrating how the DAC 100 converts a digital value ‘b0 b1 b2 b3 ’ into an analog value. The binary selectors 120 are arranged in four stages, wherein the binary selectors 120 in the first stage are controlled by the first bit b0 and its inverse b0b, the binary selectors 120 in the second stage are controlled by the second bit b1 and its inverse bib, and so on. When the input digital value is ‘0011 ’, the switches of the binary selectors 120 controlled by b0b, b1b, b2 and b3 are turned on, generating a conducting path that couples the output of the DAC 100 to the target terminal in the resistor string 110. The DAC 100 therefore transforms the digital value ‘0011’ into an analog value, i.e. the voltage level at the target terminal.
As can be seen, the conventional DAC requires 30 switches to convert a digital value with 4 bits. In general, to convert n-bit digital value, 2×(2n−1) switches are needed. As the bit number of the digital value increases, the number of switches required grows significantly, resulting in increases of chip area and power consumption for the DAC.